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/* |
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* Copyright (c) 2005-2009, OmniTI Computer Consulting, Inc. |
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* All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are |
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* met: |
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* |
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* * Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* * Redistributions in binary form must reproduce the above |
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* copyright notice, this list of conditions and the following |
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* disclaimer in the documentation and/or other materials provided |
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* with the distribution. |
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* * Neither the name OmniTI Computer Consulting, Inc. nor the names |
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* of its contributors may be used to endorse or promote products |
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* derived from this software without specific prior written |
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* permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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|
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#ifndef UTILS_NOIT_ATOMIC_H |
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#define UTILS_NOIT_ATOMIC_H |
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|
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#include "noit_config.h" |
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|
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typedef int32_t noit_atomic32_t; |
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typedef int64_t noit_atomic64_t; |
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|
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#if defined(__GNUC__) |
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|
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typedef noit_atomic32_t noit_spinlock_t; |
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static inline noit_atomic32_t |
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noit_atomic_cas32(volatile noit_atomic32_t *ptr, |
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volatile noit_atomic32_t rpl, |
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volatile noit_atomic32_t curr) { |
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noit_atomic32_t prev; |
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__asm__ volatile ( |
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"lock; cmpxchgl %1, %2" |
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: "=a" (prev) |
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: "r" (rpl), "m" (*(ptr)), "0" (curr) |
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: "memory"); |
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return prev; |
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} |
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|
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#if (SIZEOF_VOID_P == 4) |
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static inline void * |
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noit_atomic_casptr(volatile void **ptr, |
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volatile void *rpl, |
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volatile void *curr) { |
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void *prev; |
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__asm__ volatile ( |
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"lock; cmpxchgl %1, %2" |
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: "=a" (prev) |
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: "r" (rpl), "m" (*(ptr)), "0" (curr) |
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: "memory"); |
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return prev; |
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} |
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#endif |
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|
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#ifdef __x86_64__ |
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static inline noit_atomic64_t |
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noit_atomic_cas64(volatile noit_atomic64_t *ptr, |
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volatile noit_atomic64_t rpl, |
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volatile noit_atomic64_t curr) { |
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noit_atomic64_t prev; |
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__asm__ volatile ( |
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"lock; cmpxchgq %1, %2" |
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: "=a" (prev) |
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: "r" (rpl), "m" (*(ptr)), "0" (curr) |
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: "memory"); |
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return prev; |
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} |
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#if (SIZEOF_VOID_P == 8) |
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static inline void * |
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noit_atomic_casptr(volatile void **ptr, |
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volatile void *rpl, |
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volatile void *curr) { |
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void *prev; |
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__asm__ volatile ( |
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"lock; cmpxchgq %1, %2" |
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: "=a" (prev) |
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: "r" (rpl), "m" (*(ptr)), "0" (curr) |
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: "memory"); |
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return prev; |
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} |
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#endif |
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#else |
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static inline noit_atomic64_t |
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noit_atomic_cas64(volatile noit_atomic64_t *ptr, |
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volatile noit_atomic64_t rpl, |
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volatile noit_atomic64_t curr) { |
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noit_atomic64_t prev; |
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#ifdef __PIC__ |
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__asm__ volatile ( |
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"pushl %%ebx;" |
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"mov 4+%1,%%ecx;" |
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"mov %1,%%ebx;" |
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"lock;" |
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"cmpxchg8b (%3);" |
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"popl %%ebx" |
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: "=A" (prev) |
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: "m" (rpl), "A" (curr), "r" (ptr) |
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: "%ecx", "memory", "cc"); |
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#else |
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__asm__ volatile ( |
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"lock;" |
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"cmpxchg8b (%3);" |
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: "=A" (prev) |
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: "m" (rpl), "A" (curr), "r" (ptr) |
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: "memory", "cc"); |
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#endif |
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return prev; |
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}; |
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#if (SIZEOF_VOID_P == 8) |
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/* This should never be triggered.. 8 byte pointers on 32bit machines */ |
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#error "64bit pointers on a 32bit architecture?" |
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#endif |
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#endif |
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|
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static inline void noit_spinlock_lock(volatile noit_spinlock_t *lock) { |
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while(noit_atomic_cas32(lock, 1, 0) != 0); |
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} |
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static inline void noit_spinlock_unlock(volatile noit_spinlock_t *lock) { |
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while(noit_atomic_cas32(lock, 0, 1) != 1); |
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} |
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static inline int noit_spinlock_trylock(volatile noit_spinlock_t *lock) { |
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return (noit_atomic_cas32(lock, 1, 0) == 0); |
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} |
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|
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#elif (defined(__sparc) || defined(__sparcv9) || defined(__amd64) || defined(__i386)) && (defined(__SUNPRO_C) || defined(__SUNPRO_CC)) |
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|
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typedef noit_atomic32_t noit_spinlock_t; |
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|
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extern noit_atomic32_t noit_atomic_cas32(volatile noit_atomic32_t *mem, |
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volatile noit_atomic32_t newval, volatile noit_atomic32_t cmpval); |
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extern noit_atomic64_t noit_atomic_cas64(volatile noit_atomic64_t *mem, |
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volatile noit_atomic64_t newval, volatile noit_atomic64_t cmpval); |
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extern void *noit_atomic_casptr(volatile void **mem, |
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volatile void *newval, volatile void *cmpval); |
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|
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static inline void noit_spinlock_lock(volatile noit_spinlock_t *lock) { |
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while(noit_atomic_cas32(lock, 1, 0) != 0); |
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} |
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static inline void noit_spinlock_unlock(volatile noit_spinlock_t *lock) { |
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while(noit_atomic_cas32(lock, 0, 1) != 1); |
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} |
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static inline int noit_spinlock_trylock(volatile noit_spinlock_t *lock) { |
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return (noit_atomic_cas32(lock, 1, 0) == 0); |
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} |
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|
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#else |
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#error Please stub out the atomics section for your platform |
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#endif |
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|
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#ifndef noit_atomic_add32 |
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static inline noit_atomic32_t noit_atomic_add32(volatile noit_atomic32_t *loc, |
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volatile noit_atomic32_t diff) { |
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register noit_atomic32_t current; |
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do { |
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current = *(loc); |
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} while(noit_atomic_cas32(loc, current + diff, current) != current); |
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return current + diff; |
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} |
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#endif |
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|
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#ifndef noit_atomic_add64 |
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static inline noit_atomic64_t noit_atomic_add64(volatile noit_atomic64_t *loc, |
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volatile noit_atomic64_t diff) { |
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register noit_atomic64_t current; |
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do { |
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current = *(loc); |
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} while(noit_atomic_cas64(loc, current + diff, current) != current); |
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return current + diff; |
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} |
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#endif |
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|
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#ifndef noit_atomic_sub32 |
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static inline noit_atomic32_t noit_atomic_sub32(volatile noit_atomic32_t *loc, |
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volatile noit_atomic32_t diff) { |
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register noit_atomic32_t current; |
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do { |
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current = *(loc); |
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} while(noit_atomic_cas32(loc, current - diff, current) != current); |
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return current - diff; |
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} |
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#endif |
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|
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#ifndef noit_atomic_sub64 |
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static inline noit_atomic64_t noit_atomic_sub64(volatile noit_atomic64_t *loc, |
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volatile noit_atomic64_t diff) { |
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register noit_atomic64_t current; |
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do { |
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current = *(loc); |
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} while(noit_atomic_cas64(loc, current - diff, current) != current); |
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return current - diff; |
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} |
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#endif |
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|
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#ifndef noit_atomic_inc32 |
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#define noit_atomic_inc32(a) noit_atomic_add32(a, 1) |
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#endif |
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|
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#ifndef noit_atomic_inc64 |
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#define noit_atomic_inc64(a) noit_atomic_add64(a, 1) |
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#endif |
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|
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#ifndef noit_atomic_dec32 |
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#define noit_atomic_dec32(a) noit_atomic_add32(a, -1) |
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#endif |
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|
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#ifndef noit_atomic_dec64 |
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#define noit_atomic_dec64(a) noit_atomic_add64(a, -1) |
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#endif |
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|
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#endif |
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